Samsung Foundry has begun rollout of its latest 3D IC packaging tech, dubbed “eXtended-Cube” or “X-Cube*”, which it claims can result in lower power consumption and faster overall speeds.
Like all 3D integrated circuits, X-Cube is built with components stacked on top of each other, creating a single contiguous logical unit. The main advantage of this is that it’s efficient at using space, which tends to be a scarce commodity in small form-factor devices like smartphones and wearables.
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Samsung has already produced a test chip, built on a 7nm process. The experimental platform stacked a SRAM (static random access memory) chip atop a logic die, with the two parts connected using through-silicon vias (TSV).
TSV connectors allow electrical signals to pass directly through a silicon wafer or die, providing a low-latency alternative to traditional circuit connections, like wire-bonds. X-Cube also uses Samsung’s micro-bump tech, with each interconnect measuring 30nm.
This latest move follows Samsung’s previous 3D IC work, in which it introduced three-dimensional NAND flash in 2013. Elsewhere, Samsung’s foundry arch-rival showcased its first 3D chipsets last year, while Intel has its own Foveros 3D stacking tech, which appeared on Chipzilla’s Lakefield Core chips earlier this year.
According to a promo video, which weirdly visualises an X-Cube chip as a Borg Cube from Star Trek, Samsung said its 3D stacked chips will be used in mobile, wearable, AR/VR, and high-performance computing platforms. Those eager to take a deeper dive into the tech can watch Samsung’s demonstration at the Hot Chips conference, which will be live-streamed next week. ®
